EEL4930/5934 - Reconfigurable Computing (Fall 2009)

Announcements

Midterm 2 will be on the last day of classes (Wednesday, December 9th). The final project demos will take place during the first 3 days of finals week (December 14-16).

Midterm 1 is scheduled for Friday, October 9 during the normal lecture time.

Overview

Fundamental concepts at advanced undergraduate level (EEL4930) and introductory graduate level (EEL5934) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.

Course Information

Lectures


Date Topic Slides/Reading Material
M, Aug 24 Course info, Intro to RC Slides
Paper: Compton, Hauck Survey
W, Aug 26 Introduction to RC Slides
F, Aug 26 VHDL Tutorial
M, Aug 31 VHDL Tutorial
W, Sep 2 VHDL Tutorial
F, Sep 4 RC Architectures Slides
Read Chapters 1-4
W, Sep 9 RC Architectures, Cont.
F, Sep 11 RC Architectures, Cont.
M, Sep 14 Nallatech Tutorial Nallatech Slides
W, Sep 16 NP-Completeness, Optimization Problems, Heuristics Slides
F, Sep 18 RT Synthesis, Placement Slides
Paper: Placement/Routing
M, Sep 21 RT Synthesis, Placement, Cont. Papers:
Pathfinder
Versatile Place+Route (VPR)
W, Sep 23 RT Synthesis, Placement, Cont.
F, Sep 25 Advanced VHDL Topics
M, Sep 28 Lab 3 Discussion
W, Sep 30 Systolic Arrays Slides
F, Oct 2 Systolic Arrays
M, Oct 5 Systolic Arrays
W, Oct 7 Midterm Review
F, Oct 9 Midterm 2
M, Oct 12 Midterm 2 Discussion
W, Oct 14 Lab 4 Discussion, High-level synthesis Slides
M, Oct 19 High-level synthesis
W, Oct 21 High-level synthesis
F, Oct 23 High-level synthesis
M, Oct 26 High-level synthesis
W, Oct 28 High-level synthesis
F, Oct 30 High-level synthesis
M, Nov 2 High-level synthesis
W, Nov 4 Buffering Techniques Slides
Smart Buffer Paper
Smart Buffer Paper2
F, Nov 6 Smart Buffers Buffer slides (Updated)
M, Nov 9 Nallatech SRAMs
F, Nov 13 Hw/Sw Partitioning Hw/Sw Partitioning Slides
System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
An Evaluation of Bipartitioning Techniques
M, Nov 16 Hw/Sw Partitioning
W, Nov 18 Paper Guidelines
F, Nov 20 Traversal Caches Paper 1
Paper 2
M, Nov 23 Partial Reconfiguration Slides
Paper 1
Paper 2
W, Nov 25 SHMEM+ Slides
Paper
M, Nov 30 Novo-G Slides
W, Dec 2 Warp Processing, Intermediate Fabrics (IFs) Warp Processing Slides
IF Slides

VHDL Resources