Fundamental concepts at advanced undergraduate level (EEL4720) and introductory graduate level (EEL5721) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.
Date | Topic | Slides/Reading Material |
---|---|---|
F, Aug 22 | Course info, Intro to RC |
Slides Overview Paper: Compton, Hauck Survey Motivating FPGA Example: Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems Tutorial: Start reading "My VHDL Tutorial" under VHDL Resources. |
M, Aug 25 | VHDL: Introduction, Combinational Logic (2:1 Mux) |
Github tutorial for combinational logic
Design the circuit, then write the code (optional) |
W, Aug 27 | VHDL: Combinational Logic (adder) Signals vs. Variables |
Additional reading: 4-input priority encoder Generic priority encoder |
F, Aug 29 | VHDL: Combinational Logic (adder, ALU, latches) |
|
W, Sep 3 | VHDL: Sequential Logic |
Github tutorial for sequential logic Crafting Clean Reset Logic |
F, Sep 5 |
VHDL: Sequential Logic, Cont. VHDL: Finite-state machines |
Github tutorial for FSMs |
M, Sep 8 |
VHDL: Finite-state machines, Cont. VHDL: Structural architectures |
Github tutorial for structural architectures |
W, Sep 10 |
VHDL: Structural architectures, cont. VHDL: Testbench intro VHDL: FSMDs, FSM+Ds |
Github tutorial for FSMDs
FSMD example used in class |
F, Sep 12 | VHDL: FSMDs, FSM+Ds, Cont. |
Github tutorial for FSMDs
FSMD example used in class |
M, Sep 15 | Device Tradeoffs |
Device tradeoff slides Extra video |
W, Sep 17 | Device Tradeoffs, Cont. | |
F, Sep 19 | FPGA Architectures | Architecture Slides |
M, Sep 22 | FPGA Architectures, Cont. | |
W, Sep 24 | FPGA Architectures, Cont. | |
F, Sep 26 | Lab 2 | |
M, Sep 29 |
Lab 2, Cont. Optimization Problems |
Slides |
W, Oct 1 |
Optimization Problems, Cont. RTL Synthesis, Placement, and Routing |
Synthesis, placement, and routing slides
Papers: Placement/Routing, Pathfinder, Versatile Place+Route (VPR) |
F, Oct 3 |
RTL Synthesis, Placement, and Routing, Cont. Pipelining, Parallelism, Systolic Arrays |
Pipelining Slides |
M, Oct 6 | Pipelining, Cont. | |
W, Oct 8 | Midterm 1 | |
F, Oct 10 | Lab 3 | |
M, Oct 13 |
Lab 3, Cont. Parallelism, Cont. |
|
W, Oct 16 | High-level Synthesis |
High-level Synthesis Slides |