Fundamental concepts at advanced undergraduate level (EEL4720) and introductory graduate level (EEL5721) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.
| Date | Topic | Slides/Reading Material |
|---|---|---|
| W, Aug 23 | Course info, Intro to RC |
Slides Overview Paper: Compton, Hauck Survey Motivating FPGA Example: Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems Tutorial: Start reading "My VHDL Tutorial" under VHDL Resources. |
| F, Aug 25 | VHDL: Introduction, Combinational Logic (2:1 Mux) |
Github tutorial for combinational logic
|
| M, Aug 28 | VHDL: Combinational Logic (mux, adder) |
|
| W, Aug 30 | VHDL: Combinational Logic (adder, ALU, latches) |
Adder, Cont. (start ~37:00) ALU (stop ~40:00) |
| F, Sep 1 |
VHDL: Sequential Logic |
Github tutorial for sequential logic |
| M, Sep 4 | Holiday | |
| W, Sep 6 |
VHDL: Sequential Logic, Cont. VHDL: Testbench Intro VHDL: Structural Architectures |
Github tutorial for SystemVerilog testbenches (optional) |
| F, Sep 8 |
Guest Lecture: Verification VHDL: Structural Architectures |
Previous lecture on structural architecture (Start at 38:30)
Github tutorial for structural architectures |
| M, Sep 11 |
VHDL: FSMs |
Github tutorial for FSMs |
| W, Sep 13 |
VHDL: FSMDs |
Github tutorial for FSMDs
FSMD example used in class |
| F, Sep 15 |
VHDL: FSM+Ds Lab 1 Testbenches, Cont. |
Github tutorial for FSMDs
FSMD example used in class |
| M, Sep 18 | Device Tradeoffs |
Device tradeoff slides Extra video |
| W, Sep 20 | Device Tradeoffs, Cont. FPGA Architectures |
Architecture Slides |
| F, Sep 22 | FPGA Architectures, Cont. | |
| M, Sep 25 |
Lab 2 FPGA Architectures, Cont. |
|
| W, Sep 27 | Lab 2, Cont. | |
| F, Sep 29 | Optimization Problems | Slides |
| M, Oct 2 |
Optimization Problems, Cont. RTL Synthesis, Placement, and Routing |
Synthesis, placement, and routng slides
Papers: Placement/Routing, Pathfinder, Versatile Place+Route (VPR) |
| W, Oct 4 | RTL Synthesis, Placement, and Routing, Cont. | |
| F, Oct 6 (No class) | Pipelining, Parallelism, Systolic Arrays |
Pipelining Slides
Watch the following videos: Video 1 (from 5:40 on) Video 2 (from beginning to 26:00 for midterm) |
| M, Oct 9 |
Midterm Review Lab 3 |
|
| W, Oct 11 | Midterm 1 | |
| F, Oct 13 | Lab 3 | |
| M, Oct 16 |
Lab 3, Cont. Pipelining, Cont. |
|
| W, Oct 18 |
Midterm 1 Solution VHDL: for-generate Misc VHDL |
For-generate example For-generate Lecture Video (Watch from 37:31 on) Structural delay example Behavioral delay example Delay Lecture Video 1 (Watch from 11:35 on) Delay Lecture Video 2 (Watch from beginning to 19:50) |
| F, Oct 20 | High-level Synthesis |
High-level Synthesis Slides Video 1 (Watch from 32:00 on) Video 2 |
| M, Oct 23 | High-level Synthesis, Cont. |
Video |
| W, Oct 25 | Lab 4 | |
| F, Oct 27 | High-level Synthesis, Cont. | |
| M, Oct 30 | High-level Synthesis, Cont. | |
| W, Nov 1 | Metastability, Clock-Domain Crossing |
Papers Basics of setup and hold time |
| F, Nov 3 |
Metastability, Clock-Domain Crossing, Cont. |
|
| M, Nov 6 | Lab 5 | |
| W, Nov 8 | FIFOs, buffers |
Buffering Slides
Paper 1 Paper 2 Sliding-Window Paper Sliding-Window Paper on Broadwell+Arria10 |
| F, Nov 10 | Holiday | |
| M, Nov 13 | FIFOs, buffers, cont. | |
| W, Nov 15 | Final Project Overview | |
| F, Nov 17 |
No Class Final Project Overview |
Final Project (Overview) (starts at 27:40) Final Project (pipeline, user_app) Final Project (signal/kernel buffers) Final Project (dram_rd) Final Project (dram_wr) |
| M, November 20 | Timing Optimization: background, common strategies |
Timing optimization background video Timing optimization strategies video Github repo for timing optimization (includes slides) |
| W, November 22 | Holiday | |
| F, November 24 | Holiday | |
| M, November 27 | No class (finish timing optimization videos) | |
| W, November 29 | Special topics: scalable design strategies, misc verification |
Absorption FIFOs SystemVerilog Testbenches |
| F, December 1 | Special topics: assertion properties, sequences, implication | See assertions section of SV testbench tutorial |
| M, December 4 |
Special topics: coverage, constrained-random verification, UVM Q&A |
See testbench section of SV tutorial |