EEL4930/5934 - Reconfigurable Computing (Spring 2009)

Announcements

Midterm 1 - February 23. No notes/books. Calculators are allowed.

Midterm 2 - April 22. No notes/books. Calculators are allowed.

Overview

Fundamental concepts at advanced undergraduate level (EEL4930) and introductory graduate level (EEL5934) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.

Course Information

Lectures


Date Topic Slides/Reading Material
W, Jan 7 Course info, Intro to RC Slides
Paper - Compton, Hauck Survey
F, Jan 9 VHDL Tutorial See references at bottom of page.
M, Jan 12 VHDL Tutorial, Cont.
W, Jan 14 VHDL Tutorial, Cont.
F, Jan 16 Introduction to RC Slides
W, Jan 21 RC Architectures Slides
Read Chapters 1-4
F, Jan 23 RC Architectures, cont.
M, Jan 26 RC Architectures, cont.
W, Jan 28 Nallatech Tutorial Nallatech Slides
F, Jan 30 NP-Completeness, Optimization Problems, Heuristics Slides
M, Feb 2 RT Synthesis, Placement Slides
Paper - Placement/Routing
W, Feb 4 Placement+Routing
F, Feb 6 No Class
M, Feb 9 Lab 3 Discussion
W, Feb 11 Systolic Arrays Slides
F, Feb 13 Systolic Arrays, Cont.
M, Feb 16 Systolic Arrays, Cont.
W, Feb 18 Systolic Arrays, Cont.
F, Feb 20 Midterm Review
M, Feb 23 Midterm 1
W, Feb 25 Guest Lecture by Dr. Razdan
F, Feb 27 Lab 4 Discussion
M, March 2 High-level Synthesis Slides
Paper - A Quantitative Analysis of the Speedup Factors of FPGAs over Processors (Intended for the systolic array lectures)
W, March 4 High-level Synthesis Slides
F, March 6 High-level Synthesis
M, March 16 VHDL topics, High-level Synthesis Updated Slides
W, March 18 High-level Synthesis
F, March 20 High-level Synthesis
M, March 23 High-level Synthesis
W, March 25 High-level Synthesis
F, March 27 Buffering Techniques Slides
Smart Buffer Paper
Smart Buffer Paper2
M, March 30 Buffering Techniques Slides
W, April 1 Hw/Sw Partitioning Hw/Sw Partitioning Slides
System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search
An Evaluation of Bipartitioning Techniques
F, April 3 Hw/Sw Partitioning
M, April 6 Hw/Sw Partitioning
W, April 8 Warp Processing Warp Processing Slides
Warp Processors
Thread Warping
F, April 10 Partial Reconfiguration Slides
Paper
M, April 13 Intermediate Fabrics Slides
W, April 15 ImpulseC Slides
F, April 17 Performance Analysis Slides
Paper

VHDL Resources