Fundamental concepts at advanced undergraduate level (EEL4720) and introductory graduate level (EEL5721) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.
| Date | Topic | Slides/Reading Material |
|---|---|---|
| F, Aug 23 | Course info, Intro to RC |
Slides Overview Paper: Compton, Hauck Survey Motivating FPGA Example: Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems Tutorial: Start reading "My VHDL Tutorial" under VHDL Resources. |
| M, Aug 26 | VHDL: Introduction, Combinational Logic (2:1 Mux) |
Github tutorial for combinational logic
Design the circuit, then write the code (optional) |
| W, Aug 28 | VHDL: Combinational Logic (adder) Signals vs. Variables |
Additional reading: 4-input priority encoder Generic priority encoder |
| F, Aug 30 | VHDL: Combinational Logic (adder, ALU, latches) |
|
| W, Sep 4 |
VHDL: Combinational Logic (ALU, latches) VHDL: Sequential Logic |
Github tutorial for sequential logic Crafting Clean Reset Logic |
| F, Sep 6 |
VHDL: Sequential Logic, Cont. VHDL: Finite-state machines |
Github tutorial for FSMs |
| M, Sep 9 |
VHDL: Finite-state machines, Cont. VHDL: Structural architectures |
Github tutorial for structural architectures |
| W, Sep 11 |
VHDL: Structural architectures, cont. VHDL: Testbench intro |
|
| F, Sep 13 | VHDL: FSMDs, FSM+Ds |
Github tutorial for FSMDs
FSMD example used in class |
| M, Sep 16 |
VHDL: FSM+Ds, Cont. Lab 1 |
|
| W, Sep 18 | Device Tradeoffs |
Device tradeoff slides Extra video |
| F, Sep 20 | Device Tradeoffs, Cont. FPGA Architectures |
Architecture Slides |
| M, Sep 23 | FPGA Architectures, Cont. | |
| W, Sep 25 | Lab 2 | |
| F, Sep 27 | Lab 2, Cont. FPGA Architectures, Cont. | |
| M, Sep 30 | Optimization Problems | Slides |
| W, Oct 2 | RTL Synthesis, Placement, and Routing |
Synthesis, placement, and routing slides
Papers: Placement/Routing, Pathfinder, Versatile Place+Route (VPR) |
| F, Oct 4 (No class) | Pipelining, Parallelism, Systolic Arrays |
Pipelining Slides
Watch the following videos: 2022 Video 1 (from 5:40 on) 2022 Video 2 (from beginning to 26:00 for midterm) |
| M, Oct 7 (No class) | Midterm 3 Review |
2023 Lecture |
| W, Oct 9 |
Pipelining, Parallelism, Systolic Arrays, Cont. Midterm Review, Cont. |
Watch the following videos: 2022 Video 2 (26:00 to 41:00 for pipelining, 41:00+ for midterm review) 2022 Video 3 (18:00+ for remaining pipelining slides) |
| F, Oct 11 | Lab 3 |
Watch the following videos: Old Lab 3 Lecture 1 (will be updated for new lab 3) Old Lab 3 Lecture 2 (beginning to 18:15) |
| M, Oct 14 | High-level Synthesis |
High-level Synthesis Slides Video 1 (Watch from 32:00 on) Video 2 |
| W, Oct 16 | Midterm 1 (postponed from Oct 9) | |
| F, Oct 18 | No class (homecoming) | |
| M, Oct 21 | High-level Synthesis, Cont. |
Video |
| W, Oct 23 | Lab 4 |
Part 1 (from 25:00 to end) Part 2 (from beginning to 32:00) |
| F, Oct 25 | High-level Synthesis, Cont. |
Video |
| M, Oct 28 | Misc VHDL (for-generate, arrays, if-generate) | See ripple-carry adder and delay examples |
| W, Oct 30 | Metastability, Clock-domain crossing |
Lecture 1 (from 39:35 to end) Lecture 2 Papers Basics of setup and hold time |
| F, Nov 1 |
Metastability, Clock-domain crossing, Cont. Lab 5 |
Lecture |
| M, Nov 4 | FIFOs, buffers |
Buffering Slides
Paper 1 Paper 2 Sliding-Window Paper Sliding-Window Paper on Broadwell+Arria10 |
| W, Nov 6 | FIFOs, buffers, cont. | |
| F, Nov 8 | Final Project |
Final Project (Overview) (starts at 27:40) Final Project (pipeline, user_app) Final Project (signal/kernel buffers) Final Project (dram_rd) Final Project (dram_wr) |
| M, Nov 11 | Holiday | |
| W, Nov 13 | Final Project | |
| F, Nov 15 | Final Project | |
| M, Nov 18 | Misc VHDL: Inference, advanced behavioral architectures, packages, integers | Delay and counter examples |
| W, Nov 20 | Misc VHDL Cont. | |
| F, Nov 22 | Timing Analysis and Optimization Intro | Video lecture |
| M, Dec 2 | 2-process FSMD | Video Lecture (26:50 to 48:00) |