Fundamental concepts at advanced undergraduate level (EEL4720) and introductory graduate level (EEL5721) in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concepts, device architectures, design tools, metrics and kernels, system architectures, and application case studies.
Date | Topic | Slides/Reading Material |
---|---|---|
M, Aug 31 | Course info, Intro to RC |
Slides Overview Paper: Compton, Hauck Survey Motivating FPGA Example: Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems Tutorial: Start reading "My VHDL Tutorial" under VHDL Resources. |
W, Sep 2 | VHDL: Introduction, Combinational Logic |
Lecture (002)
Lecture (003) See combinational logic section of "My VHDL Tutorial" under VHDL Resources. |
F, Sep 4 | VHDL: Sequential Logic and Structural Architectures |
Lecture (004)
Lecture (005) See my tutorial. |
W, Sep 9 | VHDL: Finite State Machines, FSMD, FSM+D |
Lecture (006)
See my tutorial. |
F, Sep 11 | VHDL: FSMD, FSM+D, Testbenches Lab 1 |
Lecture (007)
See my tutorial and lab webpage. |
M, Sep 14 | VHDL: Testbenches, Cont. Device Tradeoffs |
Lecture (008)
Slides Measuring the Gap between FPGAs and ASICs |
W, Sep 16 | Device Tradeoffs, Cont. FPGA Architectures |
Lecture (009)
Architecture Slides |
F, Sep 18 | FPGA Architectures, Cont. | Lecture (010) | M, Sep 21 |
FPGA Architectures, Cont. Lab 2 L3Harris Talk |
L3Harris Slides
Lecture (011) |
W, Sep 23 | Lab 2, Cont. | Lecture (012) |
F, Sep 25 | Optimization Problems |
Slides
Lecture (013) |
M, Sep 28 |
Optimization Problems, Cont. RT Synthesis, Placement, and Routing |
Slides
Papers: Placement/Routing, Pathfinder, Versatile Place+Route (VPR) Lecture (014) |
W, Sep 30 |
RT Synthesis, Placement, and Routing, Cont. Pipelining, Parallelism, Systolic Arrays |
Pipelining Slides
Lecture (015) |
F, Oct 2 | Pipelining, Cont. | Lecture (016) |
M, Oct 5 | Lab 3 | Lecture (018) |
W, Oct 7 |
Lab 3, Cont. Pipelining, Cont. VHDL: for-generate, if-generate |
Lecture (019) |
F, Oct 9 | Midterm 1 Review | Lecture (017) |
M, Oct 12 | Midterm 1 | |
W, Oct 14 | Class Cancelled | |
F, Oct 16 | VHDL: for-generate, if-generate, cont. Lab 4 | Lecture (020) |
M, Oct 19 | Lab 4, Cont. | Lecture (021) (Start at 18:40) |
W, Oct 21 | High-level Synthesis |
High-level Synthesis Slides Lecture (022) |
F, Oct 23 | High-level Synthesis, Cont. | Lecture (023) |
M, Oct 26 | High-level Synthesis, Cont. | Lecture (024) |
W, Oct 28 | High-level Synthesis, Cont. | Lecture (025) |
F, Oct 30 | Metastability, Clock-Domain Crossing |
Papers Basics of setup and hold time Lecture (026) |
M, Nov 2 |
Clock-Domain Crossing, Cont. Lab 5 |
Lecture (027) |
W, Nov 4 | Buffering |
Buffering Slides
Paper 1 Paper 2 Sliding-Window Paper Sliding-Window Paper on Broadwell+Arria10 Lecture (028) |
F, Nov 6 | Final Project (Overview) | Lecture (029) |
M, Nov 8 | Final Project (Pipeline, user_app, signal/kernel buffers, wrapper) | Lecture (030) |
W, Nov 11 | Holiday | |
F, Nov 13 | Final Project (wrapper, dram_rd, EDN files, dram_wr) | Lecture (031) |
M, Nov 16 | Final Project (C++, control) | Lecture (032) |
W, Nov 18 |
Final Project (testing suggestions) 2-process FSMD |
FSMD code Lecture (033) |
F, Nov 20 |
2-process FSMD, Cont. Elastic IP |
FSMD Lecture (035) (only watch first 7 minutes) Lecture: Elastic IP |
M, Nov 23 | FPGA Virtualization |
Lecture: Intermediate Fabrics Paper 1 Paper 2 |
W, Nov 25 | Holiday | |
F, Nov 27 | Holiday | |
M, Nov 30 | Timing Optimization |
Lecture: Background and Challenges Lecture: Optimization Strategies Github repo with code and slides |
W, Dec 2 | Timing Optimization (Timing Analyzer Tutorial) |
Lecture: Optimization of Adder Tree Lecture: Optimization of a Timer (Optional) |
F, Dec 4 | Midterm 2 Review |
Lecture (36) |
M, Dec 7 | FPGAs in Networking Applications & Graduate Studies |
Slides Lecture |
W, Dec 9 | Midterm 2 |