We will also be using the Digilent Analog Discovery Board. If you have not purchased it yet, you can here: http://www.digilentinc.com/Products/Detail.cfm?Prod=ANALOG-DISCOVERY

Lab workarounds

If you run into unexplainable errors, make sure your Quartus and/or Modelsim projects are stored in a path without any spaces. It seems to have fixed the problems for some people.

If you are doing a timing simulation, make sure to remove the original vhd file from the Modelsim project. If you don't, two files will define the same entity, which will likely cause problems.

If you can't find the USB-Blaster device in Windows, try the following suggestion from another student:
" within device manager, if you double click on the Altera USB-Blaster, and go to the Driver tab, press on Update Driver, then press Browse my computer for driver software -> browse. This is where you find the file. In my case, and for most people, it should be under: Local Disk (C:) -> intelFPGA_lite -> 17.1 -> quartus -> drivers -> usb-blaster. Select that folder and press ok. Then press next in the update driver window and it will load it with functional drivers. "

Lab 0: (Week 2: Jan 16-22)

1. Obtain and test board in lab. If you have questions about the board, you can read the manual here.
2. Install Quartus Prime 17.1 Lite Edition (free) . Before downloading, make sure the ModelSim option is selected. You can unselect device support for everything except the MAX 10, MAX II, and MAX V FPGAs if you need to save disk space.
3. Read over the following tutorials (ignore references to lab assignment tasks. You will be using these tools as part of the next lab)
   • Oscillosope Tutorial
   • Signal Tap Tutorial (ignore line ment ioning "Incremental Build")
   • Digilent Analog Discovery Getting Started
4. Review Quartus Tutorials 1 and 3 (Appendices in textbook)
5. Start reading the ModelSim tutorial. You do not need to finish the entire tutorial, but you will be using this tool all semester, so make sure you understand the basics. You can install a free version of Modelsim from the earlier Quartus link.

Lab 1: Introduction to EEL 4712 Digital Design Lab (Week 3: Jan 23-29)

• Lab Instructions
• VHDL Files
• Pin assignment instructions
• Pin assignment tutorial
  
  
• Checklist

Lab 2: Generic-Width Behavioral ALU (Week 4: Jan 30-Feb 5)

• Lab Instructions
• Small sample testbench for alu_ns
• Top level entity

You will find these incredibly useful:

• VHDL Package Reference
• VHDL Math Tricks (Comparison of std_logic_arith and numeric_std)

• Lab 2 Checklist

Lab 3: Ripple-Carry and Carry-Lookahead Adders (Week 5: Feb6-Feb12)

• Lab Instructions
• Adder entity skeleton code
• Provided testbench
• Top-level entity

• Top-level for timing simulation
• Testench for timing simulation

• Lab 3 Checklist

Lab 4: Finite State Machines (Week 7: Feb20-Feb26)

• Lab Instructions
• All provided code

• Lab 4 Checklist

Lab 5: GCD Calculator (Week 8: Feb27-Mar12) (only the Monday section demos after spring break)

• Lab Instructions
• All provided code
• For additional extra credit, please test the vJTAG interface that enables communication between your laptop and board. First, download extra_credit.zip. Read the instructions in GUI_Instructions.doc. Add your lab5 gcd code to the specified project. As part of the pre-lab submission, create a separate report that specifies the operating system version you are using, and any problems you encountered. Future labs will use a polished version of this interface, so I'm looking for any suggestions you might have.

• Lab 5 Checklist

Lab 6: VGA Interfacing (Week 9-10: Mar13-March26) The second week is optional for those that finish early. Everyone must attend the first week.

• Lab Instructions
• MIF file instructions
• All provided code

• Lab 6 Checklist

Workarounds:

• If you are getting the following error:
  
  "Error (16031): Current Internal Configuration mode does not support memory initialization or ROM. Select Internal Configuration mode with ERAM."
  
  you can fix it with the following:
  
  Assignments -> Device -> Device and Pin Options -> Configuration -> Configuration Mode: Single uncompressed image with Memory Initialization

Final Project: MIPS-like Microprocessor (3 weeks, Starts on Tuesday, April 3)

• Instructions (SUBJECT TO CHANGE)
• All provided material